A Study of Micro-crack on Surface Mount IC Package

In integrated circuit (IC) manufacturing industry, package micro-crack and other crack-related flaws are common defect frequently encountered in trim and form process of a surface mount IC package. This paper focused on the prevention of the micro-crack occurrence as it affected the assembly yield performance of the device in focus. Process mapping and defect concentration diagram were done to isolate the location of the defect and the processes involved. Containment and corrective actions were employed to fully narrow down the defect occurrence. Finally, a 99% improvement on defect parts per million (ppm) reduction was observed after implementation of all corrective actions.

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